IPC-J-STD-003C-WAM1&2: Solderability Tests for Printed Boards
The IPC-J-STD-003C-WAM1&2 standard prescribes test methods, defect definitions and illustrations for assessing the solderability of printed board surface conductors, attachment lands and plated-through holes (PTHs). The IPC-J-STD-003C-WAM1&2 standard is not intended to verify the potential of successful processing at assembly or to evaluate design impact on wettability. The IPC-J-STD-003C-WAM1&2 standard describes procedures or methods to determine the acceptable wettability of a finish. Wettability can be affected by handling, finish application and environmental conitions. This standard describes solderability determinations that are made to verify that the printed board fabrication processes and subsequent storage have had no adverse effect on the solderability of those portions of the printed board intended to be soldered. Reference coupons or representative portions of a printed board may be used. Solderability is determined by evaluation of a test specimen which has been processed as part of a panel of boards and subsequently removed for testing per the method selected.