This document is based on data from 74 companies worldwide (52 OEMs and 22 printed board fabricators) and presents data on the current state (2018) of printed board fabrication and OEM printed board requirements and their use of emerging technologies, as well as predictions from both industry segments on how these measurements and requirements are expected to change by 2023. Topics covered include board properties (thickness, layer count, density, line width and spacing, via diameters, aspect ratios, I/O pitch, via design, blind and buried vias, thermal properties), materials (rigid, flexible, stretchable, metal core, loss characteristics, surface finishes), special structures (embedded components, chip packages), printed electronics (including 3D printing and e-textiles), compliance and technical challenges, and general trends. The data are segmented by two regions (North America and Europe; Asia and Africa) and two types of products (mobile and installed).
This standard establishes the guidelines of numerical analysis for microelectronics packaging design and reliability in its efforts to standardize and document some of the basic tenets of a typical Finite Element Analysis (FEA) model.
This technical report was developed to provide the results of an investigation which details the test procedures, test results and team conclusions for the IPC Cleaning and Cleanliness Testing Program, Phase 3, Low Solids Flux in Ambient Air. The technical report provides an investigation on material and process alternatives to the use of chlorofluorocarbons (CFCs) in electronics manufacturing to which the Phase 3 effort has been dedicated to characterizing the cleanliness aspects of low solids fluxes, sometimes referred to as "no-clean" fluxes.
