Products
Surface Insulation Resistance (SIR) testing is a tool used not only for characterization testing of production processes such as solder masks, soldering flux, and conformal coatings, but also for examining the electrochemical reactions at each stage of the electronic assembly production process. This handbook covers the terminology, theories, test procedures and test vehicles of SIR testing...
This standard provides a marking and labeling system that aids in assembly, rework, repair and recycling and provides for the identification of: those assemblies that are assembled with lead-containing or lead-free solder; components that have lead-containing or lead-free second level interconnect terminal finishes and materials; the maximum component temperature not to be exceeded during assembly...
The IPC-9709A standard guideline document establishes an Acoustic Emission (AE) method to enhance evaluation of the performance and reliability of surface mount attachments of electronic assemblies during mechanical loading.
This specification establishes the certification requirements for facilities that inspect/test printed boards, components and materials. This specification is intended to provide a minimum standardized basis for evaluating or auditing a technically oriented inspection/testing facility. Revised November 1997. 15 pages.
Covers the requirements for copper/invar/copper (CIC), copper/molybdenum/ copper (CMC) and three-layer composites for use in electronic applications.
This essential industry standard provides descriptions and illustrations of electronic interconnect industry terminology to help users and their customers break down language barriers. Revision M contains over 220 new or revised terms, including new terminology for conformal coatings, potting and encapsulation processes, stencil design, statistical process control, and flexible printed board...
This essential industry standard provides descriptions and illustrations of electronic interconnect industry terminology to help users and their customers break down language barriers. Revision K contains more than 220 new or revised terms, including new terminology for thermal properties, etchback, assembly processing, hole drilling, and microvia technology. Also includes commonly used industry...
This essential industry standard provides descriptions and illustrations of electronics interconnect industry terminology to help users and their customers break down language barriers. Revision J contains nearly 400 new or revised terms, including new terminology for chip scale and area array packaging, cable and wire harness technology, assembly processing, moisture sensitive components, and...
IPC/WHMA-A-620D is the only industry-consensus standard for Requirements and Acceptance of Cable and Wire Harness Assemblies. IPC/WHMA-A-620D describes materials, methods, tests and acceptance criteria for producing crimped, mechanically secured and soldered interconnections and the related assembly activities associated with cable and harness assemblies. IPC/WHMA-A-620D was developed by IPC and...
These tables are from IPC/WHMA-A-620 Revision B Chapter 19 Testing. They are provided in an electronic format that permits users to edit the tables to add user-specific criteria. These files are authorized for copying/reproduction.
Establishes design concepts, guidelines and procedures for reliable printed wiring assemblies. Focuses on SMT or mixed technology PWAs, specifically addressing the interconnect structure and the solder joint itself. Discusses substrates, components, attachment materials, coatings and assembly processes and testing considerations. In addition, this document contains detailed appendices covering...
This standard establishes construction detail requirements for bumps and other terminal structures used for Flip Chip Scale carriers. The specific standards for different terminations are appropriately matched to a particular interconnection process and include such diverse terminations as solder bumps, columns, non-melting stand-offs and conductive polymer deposits. The document articulates a set...
Establishes mechanical drop and shock and test guidelines for assessing solder joint reliability of printed board assemblies from system to component level. This document addresses methods to define mechanical shock use-conditions, methods to define system level, system printed board level and component test board level testing that correlate to such use conditions and guidance on the use of...
Guidelines for accelerated reliability testing of surface mount solder attachments when evaluating and extrapolating the results of these tests towards actual use environments of electronic assemblies. 50 pages. Released November 1992.
Covers requirements and test methods for thermally conductive dielectric adhesives used to bond components in place. Permanent, removable and self-shimming adhesives are addressed. 18 pages. Released January 1995.
Establishes the specific requirements for organic mounting structures used to interconnect chip components, which in combination form the completed functional organic single-chip module (SCM-L) or organic multichip module (MCM-L) assembly. Includes the quality and reliability assurance requirements that must be met for their acquisition. For use with IPC-6011. 25 pages. Released February 1998.
This standard is the first of its kind for IPC; the first acceptability standard for electronic enclosures. It contains acceptability criteria that pertain to the "box build" of the assembly process. This standard has been written to direct manufacturers and end users of electronic enclosures of electrical and electronic equipment to understand the best practices to meet requirements, ensuring the...
Contains over 150 industry approved test techniques and procedures for chemical, mechanical, electrical, and environmental tests on all forms of printed boards and connectors. New and updated test methods are available for download at https://www.ipc.org/test-methods.
IPC-6012E specification covers qualification and performance of rigid printed boards, including single-sided, double-sided, with or without plated-through holes, multilayer with or without blind/buried vias and metal core boards. It addresses final finish and surface plating coating requirements, conductors, holes/vias, frequency of acceptance testing and quality conformance as well as electrical...
Printed board quality encompasses many parameters, cleanliness being one important parameter. This document defines the recommended general requirements for the cleanliness of unpopulated (bare) single, double-sided and multilayer printed boards. Coverage is given to Ion Chromatography (IC) testing and Ionic cleanliness testing for process control. 6 pages. Released December 2009.
Establishes requirements, definitions and certification provisions for optical inspection aids. Defines inspection grades to be used as accept/reject criteria for optical inspection aids. 40 pages. Released October 1993.
This standard describes the methods of inspecting and cleaning all optical interfaces so that interconnectivity integrity of the optical signal is maintained. The information provided focuses on techniques and methods to accomplish maximum quality of the interface and describes methods of contamination prevention. The target audience for this standard are Manufacturing Operators, Manufacturing...
Printed board flatness is largely affected by a change in intrinsic properties through exposure to variances in temperature. The worst case deviation of the printed board from flatness may be at room temperature, peak temperature during reflow, or at any temperature in between. Printed board flatness must therefore be characterized during the entire reflow thermal cycle, and not solely at room...
IPC JEDEC J-STD-020 is used to determine what moisture-sensitivity-level (MSL) classification level should be used so that surface mount devices (SMDs) can be properly packaged, stored and handled to avoid subsequent thermal and mechanical damage during the assembly solder reflow attachment and/or repair operation. J-STD-020 covers components to be processed at higher temperatures for lead-free...
J-STD-075 picks up where J-STD-020 left off by providing test methods to classify worst-case thermal process limitations for electronic components. Classification is referenced to common industry wave and reflow solder profiles including lead-free processing. The classifications represent maximum process sensitivity levels and do not establish rework conditions or recommended processes for an...
Coming Soon
IPC-7095E: Design and Assembly Process Implementation for Ball Grid Arrays (BGAs)
IPC-2294: Design Standard for Printed Electronics on Rigid Substrates
IPC-6904: Qualification and Performance Specifications for Printed Electronics on Rigid Substrates
J-STD-005B: Requirements for Soldering Pastes
IPC-4105: Specification for Metal Base Copper Clad laminates for Rigid Printed Boards
J-STD-004D: Requirements for Soldering Fluxes
IPC-4413: Specification for Finished Fabric Woven from Low Dk Glass for Printed Boards