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IPC-WP-116A Cover Images

IPC-WP-116 - Revision A - White Paper

Guidance for the Development and Implementation of a Foreign Object Debris (FOD) Control Plan

Document #:
IPC-WP-116
Revision
A
Product Type
White Paper
Released:  03/01/2022
Language
English
Current Revision
The IPC-WP-116A white paper provides guidance to control and mitigate risks associated with the introduction of Foreign Object Debris (FOD) in electrical and electronic assemblies. Guidance to control and mitigate risks associated with the introduction of Foreign Object Debris (FOD) in electrical and electronic assemblies is provided. A template for developing a Foreign Object Debris (FOD) Control...
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IPC-WP-023 - White Paper

IPC Technology Solutions White Paper on Performance-Based Printed Board OEM Acceptance: The Hidden Reliability Threat

Document #:
IPC-WP-023
Revision
Original Version
Product Type
White Paper
Released:  05/01/2018
Language
English
Current Revision
IPC-WP-023 is an IPC Technology Solutions White Paper addressing reliability issues associated with stacked microvias. There is evidence that staggering vias can result in a more robust structure; however, staggering microvias is only a temporary solution to accommodate complex designs with microvias built with weak interface structures IPC-WP-023 white paper provides an investigation of these...
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IPC/PERM-WP-022 - White Paper

Mitigation of Pure Tin Risk by Tin-Lead SMT Reflow - Results of an Industry Round-Robin - Final Report

Document #:
IPC/PERM-WP-022
Revision
Original Version
Product Type
White Paper
Released:  09/05/2018
Language
English
Current Revision
Manufacturers of high reliability electronics have been working for many years to mitigate the deleterious effects of tin whisker formation. One highly effective means to suppress the growth of tin whiskers is to replace the pure tin plating with reflowed tin-lead solder. One approach is to fully consume the tin plating by tin-lead solder during the SMT reflow process. This phenomenon of tin...
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IPC-WP-003 - White Paper

Chip Mounting Technology

Document #:
IPC-WP-003
Revision
Original Version
Product Type
White Paper
Released:  08/01/1993
Language
English
Current Revision
Status of the technology discussion on the various methodologies for mounting and interconnecting active devices to a variety of substrate materials is summarized in this document. Reviews mounting techniques of tape automated bonding (TAB), chip on board (COB) and flip chip. Examinations of the most commonly used substrate options of laminate, ceramic and silicon are also reviewed. Editor: John...
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Coming Soon

IPC-7095E: Design and Assembly Process Implementation for Ball Grid Arrays (BGAs)

IPC-2294: Design Standard for Printed Electronics on Rigid Substrates

IPC-6904: Qualification and Performance Specifications for Printed Electronics on Rigid Substrates

J-STD-005B: Requirements for Soldering Pastes

IPC-9691C: User Guide for the IPC-TM-650, Method 2.6.25 Conductive Anodic Filament (CAF) Resistance and Other Internal Electrochemical Migration Testing

IPC-4105: Specification for Metal Base Copper Clad laminates for Rigid Printed Boards

J-STD-609C: Marking and Labeling of Components, PCBs and PCBAs to Identify Lead (Pb), Lead-Free (Pb-free) and Other Attributes

IPC-4556A: Specification for Electroless Nickel/Electroless Palladium/ Immersion Gold (ENEPIG) Plating for Printed Boards

J-STD-004D: Requirements for Soldering Fluxes

IPC-4413: Specification for Finished Fabric Woven from Low Dk Glass for Printed Boards

IPC-HERMES-9852 Version 1.6: The Global Standard for Machine-to-Machine Communication in SMT Assembly